In mobile communication systems of recent years, the spread spectrum (SS) communication schemes attract attention as one of transmission schemes of various media such as images, voices and data. In the spread spectrum communication schemes, there are included the direct sequence (DS) scheme and the frequency hopping (FH) scheme. Among them, the DS scheme is a scheme of multiplying an information signal directly by a pseudonoise code sequence having a band far wider than that of the information signal, thereby applying spread spectrum processing on the information signal, and conducting communication.
In the spread spectrum pulse position modulation (SS-PPM) communication scheme, which is one of the DS schemes, information data of a plurality of bits can be transmitted by one spread-spectrum signal, and consequently a higher information transmission speed can be implemented.
FIG. 12 is a block diagram showing a configuration of a spread spectrum transmission apparatus used in the conventional spread spectrum pulse position modulation communication scheme. FIG. 13 is a diagram showing a frame structure used in the conventional spread spectrum pulse position modulation communication scheme. FIG. 14 is a block diagram showing a configuration example of a spread spectrum reception apparatus used in the conventional spread spectrum pulse position modulation communication scheme. By the way, the conventional art examples of FIGS. 12 and 13 have been quoted from Japanese Patent Application Laid-Open Publication No. 4-113732 entitled “Spread spectrum pulse position modulation communication scheme.”
As shown in FIG. 12, a spread spectrum transmission apparatus used in the conventional spread spectrum pulse position modulation communication scheme includes a clock signal generator 801, a modulo M+2L counter 802, an M+L−1 detector 803, a serial-parallel converter 804, a buffer 805, a frequency multiplier 806, a comparator 807, an OR gate 808, a pseudonoise signal generator (PN signal generator) 809, an oscillator 810, a modulator 811, a band pass filter (BPF) 812, and an antenna 813.
First, by referring to FIG. 13, a frame structure using the conventional spread spectrum pulse position modulation communication scheme will now be explained. As shown in FIG. 13, one frame is formed of M+2L slots. L is the length (the number of chips) of a pseudonoise code sequence (PN code). M is the number of pulse position information pieces (the number of chips) of spread spectrum pulses (SS pulses) corresponding to an information content to be inserted in one frame and transmitted. One slot length is equal to one chip of the pseudonoise code sequence.
Operation will now be explained. With reference to FIG. 12, the clock signal generator 801 generates a clock having a clock rate which corresponds to the chip rate in the direct sequence scheme, and outputs the clock to the modulo M+2L counter 802 and the PN signal generator 809. The clock rate of the clock generated by the clock signal generator 801 is denoted by Rc.
The modulo M+2L counter 802 is a counter which counts from a value 0 to a value of M+2L−1. Its count value is denoted by C. The count value C of the modulo M+2L counter 802 is supplied to the M+L−1 detector 803 and the comparator 807.
In the case where the count value (C) of the modulo M+2L counter 802 is equal to the value of M+L−1, the M+L−1 detector 803 outputs a logic “1” to the buffer 805, the frequency multiplier 806, and the OR gate 808. The output frequency (the reciprocal) of the M+L−1 detector 803 is equal to the output frequency of the modulo M+2L counter 802. Therefore, its value becomes Rc/(M+2L). The value Rc/(M+2L) is denoted by Rf.
The frequency multiplier 806 multiplies the frequency of the output of the modulo (M+2L) counter 802 to K times, and outputs a resultant signal to the serial-parallel converter 804. K is the number of transmission bits per frame. A clock rate Rb of the frequency multiplier 806 is K times the frame rate Rf.
The serial-parallel converter 804 is typically formed of a K-bit shift register. Bit serial transmission data input to the serial-parallel converter 804 is sampled at timing of an output speed Rb. Therefore, the output speed Rb is called bit rate. An output (parallel data) of the serial-parallel converter 804 is supplied to the buffer 805.
The buffer 805 is a K-bit parallel-input, parallel-output register which samples the output signal of the serial-parallel converter 804 at timing of the frame rate Rf. The output of the buffer 805 is serial data input to the serial-parallel converter 804 and converted into a parallel form at aligned timing. This signal is called symbol, and a binary value of the output is denoted by S. The symbol can assume a total of M values. The output of the buffer 805 is supplied to the comparator 807.
When the relation C=S is satisfied, the comparator 807 outputs a logic “1” to the OR gate 808. S and C satisfy the relations 0≦S<M and 0≦C<M+2L. The OR gate 808 combines the output signal of the M+L−1 detector 803 and the output signal of the comparator 807, and a resultant signal to the PN signal generator 809. The output signal of the M+L−1 detector 803 indicates the position of a frame synchronizing signal. The output signal of the comparator 807 indicates a position corresponding to the data symbol.
When a pulse has got on the output signal of the OR gate 808, the PN signal generator 809 generates a pseudonoise code sequence over L chips, and then outputs a “0.” The oscillator 810 generates a sine wave signal having a carrier frequency fc. Outputs of the PN signal generator 809 and the oscillator 810 are supplied to the modulator 811.
The modulator 811 multiplies the output (the PN signal) of the PN signal generator 809 by the output (the carrier frequency signal) of the oscillator 810. An output signal of the modulator 811 is subject to filtering processing of removing undesired frequency components in the bandpass filter (BPF) 812, amplified suitably by a buffer amplifier or an output amplifier although not illustrated, and output from the antenna 813 as a radio wave. This transmission signal is denoted by tx.
As shown in FIG. 14, a spread spectrum reception apparatus used in the conventional spread spectrum pulse position communication scheme includes an antenna 901, an amplifier (AMP) 902, a modulator 903, an oscillator 904, a band pass filter (BPF) 905, an automatic gain control circuit (AGC) 906, a matched filter 907, a detection device 908, a frame synchronization circuit 909, a pulse position measurement circuit 910, and a parallel-serial converter 911.
Operation of the reception apparatus will now be explained. A received signal rx received by the antenna 901 is similar to the transmission signal tx except the transmission distortion and transmission delay. The received signal rx is amplified by the amplifier 902, converted to a signal of an intermediate frequency in the modulator 903 by using a local signal fed from the oscillator 904, subjected to signal bandwidth limiting processing in the bandpass filter (BPF) 905, and made a signal having a fixed level in the automatic gain control circuit (AGC) 906.
The signal output from the automatic gain control circuit (AGC) 906 is input to the matched filter 907. If there is an input which coincides with a pattern, the matched filter 907 outputs a signal of an intermediate frequency which corresponds to one chip section, in a pulse form. The detection device 908 conducts envelope detection on the signal output from the matched filter 907. An output of the detection device 908 is supplied to the frame synchronization circuit 909 and the pulse position measurement circuit 910.
The frame synchronization circuit 909 conducts frame synchronization on the basis of the output signal of the detection device 908, and outputs a frame synchronization pulse synchronized to frame periods to the pulse position measurement circuit 910. The pulse position measurement circuit 910 conducts pulse position demodulation by using the output signal of the detection device 908 and the frame synchronization pulse output from the frame synchronization circuit 909, and outputs a K-bit parallel demodulated data sequence to the parallel-serial converter 911. The parallel-serial converter 911 conducts parallel-serial conversion on the input K-bit parallel demodulated data sequence, and outputs one demodulated data sequence.
In the communication system using the conventional spread spectrum pulse position modulation communication scheme, a transmission speed tr represented by the following equation (1) is implemented by using the transmission apparatus shown in FIG. 12 and the reception apparatus shown in FIG. 14.                               t          ⁢                                           ⁢          r                =                                                            log                2                            ⁢              M                                      (                              M                +                                  2                  ⁢                  L                                            )                                ⁢                                           ⁢                      R            c                                              (        1        )            
However, the conventional spread spectrum pulse position modulation communication scheme as described above has a problem that each user cannot conduct data communication faster than the transmission speed represented by the equation (1) when conducting data communication by using one pseudonoise code sequence per user.
Further, in the case where data communication is conducted by using a plurality of pseudonoise code sequences per user, data communication faster than the transmission speed represented by the equation (1) can be conducted. By doing so, however, there is a problem that the circuit scale of the transmission apparatus and the reception apparatus becomes large according to the number of pseudonoise code sequences in use.
The present invention has been achieved in order to solve the above problems. It is an object of this invention to provide a spread spectrum transmission apparatus, a spread spectrum reception apparatus, and a spread spectrum communication system using a spread spectrum pulse position communication scheme capable of conducting data communication faster than the transmission speed represented by the equation (1) by using one pseudonoise code sequence per user without making the circuit scale too large, and capable of having a favorable bit error rate characteristic even in the case where a received signal is subject to nonlinear amplification.